High power RF transistors such as LDMOS (laterally diffused metal oxide semiconductor) transistors have input and output impedances significantly lower than 50 ohms (high Q impedance), yet the functioning RF circuit has to be matched to 50 ohms. To facilitate the impedance match to 50 ohms, the RF transistor is typically designed with a match circuit on the input and output of the transistor that is integrated into the packaged transistor. The match network helps reduce the Q of the packaged transistor, making it easier to match to 50 ohms. Typically the improvement in impedance can only be achieved in a narrow frequency range. In addition, the match network helps to shape the frequency response of the transistor and amplifier such that there is high gain at the desired operating frequency, and the gain is suppressed outside that frequency range.
Known techniques for packaging high power RF transistors including providing a low-pass L-C-L network to match the input of the RF transistor. This low-pass L-C-L network matches the input impedance of the transistor to a lower Q over a specific frequency range. This low-pass L-C-L network includes discrete components and electrical connectors. Typically, the low-pass L-C-L network is designed assuming a nominal reactance value that is tailored to a specific frequency range. This nominal reactance value assumes nominal component values (i.e., capacitance, inductance, and resistance) of the discrete components and electrical connectors. However, actual component values may deviate from the nominal component values due to factors such as process variation. In fact, minor variations to the component values, such as an increase in capacitance of +/−5, percent may have a substantial impact on the performance of the input impedance network. In many applications, this deviation may be significant enough such that the part is not within specifications and must be discarded. Further, this deviation can lead to lower efficiency and power output of the device. One known technique to address this issue is to test the device during manufacturing and to subsequently perform corrective measures that compensate for deviations from the nominal values. However, these techniques add additional cost and complexity and are ill-equipped to compensate for every possible deviation from the nominal values.